1. Field of the Invention
This invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device having analog and digital circuits formed in one semiconductor substrate.
2. Description of the Related Art
As a semiconductor device having digital and analog circuits formed on the same chip, a semiconductor device is disclosed in Japanese Patent Disclosure No. H.4-251970 (Japanese Patent Application No. H.3-1232).
In the semiconductor device disclosed in Japanese Patent Disclosure No. H.4-251970, two wells are formed in a substrate, the analog circuit is formed in one of the two wells and the digital circuit is formed in the other well.
With the above structure, since each of the two well regions is surrounded by the substrate, the analog circuit and the digital circuit can be electrically isolated from each other not only in the surface portion of the substrate but also in the deep portion of the substrate. Since the substrate absorbs electrical noise generated from the digital circuit, transmission of the electrical noise can be prevented by the substrate so that mutual interference between the digital circuit and the analog circuit can be suppressed.
However, in the semiconductor device disclosed in Japanese Patent Disclosure No. H.4-251970, influence by the mutual interference that the characteristic of the analog circuit will fluctuate still remains. This is considered because the substrate potential is derived from the power source of the digital circuit via a wiring which is laid in a complicated configuration. For example, if undershoot of the power source potential or the like occurs in the digital circuit section, this is transmitted as noise and input to the substrate via the wiring.
A P-type region of high impurity concentration which is electrically connected to the wiring is formed in the substrate. The P-type high impurity concentration region is disposed near the well region in which the analog circuit is formed. Therefore, noise is input from the P-type high impurity concentration region 106 to the drain of a transistor which constitutes an analog circuit section via a path of a resistor RSUB (it is assumed that the substrate is a conductive body having the resistor RSUB)--capacitor C1 (it is assumed that the PN junction between the substrate and the well region is a dielectric body)--resistor RWELL (it is assumed that the well region is a conductive body having the resistor RWELL)--capacitor C2 (it is assumed that the PN junction between the well region and the drain of the transistor is a dielectric body) and is thus introduced into the analog circuit.